1. Filed of the Invention
The present invention pertains to a testsite used for evaluation of integrated circuits and, more particularly, pertains to a testsite where high frequency decoupling may be achieved by insertion of capacitors in close proximity to the actual IC being tested.
2. Description of the Prior Art
The prior art testsites have not provided reliable and linear controlled impedance testsites. It has been burdensome to control the impedance for testsites which is required for testing state-of-the-art integrated circuits, especially at 50 ohms.
The prior art testsites were not stable or noise free, and did not provide a system which could repetitively transfer electrical signals between the IC under test and the tester with minimal signal distortion. Prior art testsites did not provide the capability for installation of decoupling capacitors in such close proximity to the IC being tested.